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simulavr
1.1.0
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This is the complete list of members for SpiSink, including all inherited members.
| _clockIsIdleHigh | SpiSink | private |
| _clockSampleOnLeadingEdge | SpiSink | private |
| _miso | SpiSink | private |
| _misoState | SpiSink | private |
| _port | SpiSink | private |
| _prevClkState | SpiSink | private |
| _prevSS | SpiSink | private |
| _sclk | SpiSink | private |
| _sclkState | SpiSink | private |
| _sr | SpiSink | private |
| _ss | SpiSink | private |
| _ssState | SpiSink | private |
| _state | SpiSink | private |
| SpiSink(Net &ssNet, Net &sclkNet, Net &misoNet, bool clockIsIdleHigh=true, bool clockSampleOnLeadingEdge=true) | SpiSink | |
| Step(bool &trueHwStep, SystemClockOffset *timeToNextStepIn_ns=0) | SpiSink | privatevirtual |
| ~SimulationMember() | SimulationMember | inlinevirtual |